This invention relates to a method and apparatus for the deposition of oxide films and, more particularly, to an improved low temperature, chemical vapor deposition method for the deposition of silicon dioxide films.
Low temperature chemical vapor deposited silicon dioxide has found extensive use in microelectronic applications as gate dielectrics in the metal-oxide-semiconductor field-effect transistor (MOSFET) devices, passivation layers, interlayer insulators, and as protection masks to pattern and expose some regions for processing while shielding other areas. In addition, amorphous silicon oxides are routinely used in large area electronics and opto-electronics such as in displays, optical interconnects, and solar photovoltaic cells. In many of these devices, there is a need to reduce the oxide film deposition temperatures while retaining overall uniformity, homogeneity and dielectric quality. For example, in displays and solar cells, commonly employed low temperature glass substrates limit the maximum oxide processing temperature to about 600xc2x0 C. For dielectrics used between metals in integrated circuit (IC) manufacturing, the deposition temperature must be below 450xc2x0 C. to prevent the aluminum in the conductor lines from reacting with the silicon. In addition, high quality oxides deposited at a temperature below 200xc2x0 C. would be highly useful to the optical coatings industry and could also help bring about the use of plastic substrates for microelectronic devices. Therefore, great effort has been devoted to the reduction of the deposition temperature necessary for high quality silicon dioxide film growth.
The deposition of high quality silicon dioxide films at temperatures below 400xc2x0 C. has, to date, been dominated by oxidizing plasma-enhanced chemical vapor deposition (PECVD) reactions which use tetraethyloxysilane (TEOS) or silane (SiH4) as the silicon precursor source. These low temperature oxides have not only been used for thin film transistor (TFT) device fabrication (see D. Buchanan et al., IEEE Electron Device Letters, V. 9, p. 576 (1988)), but are also commonly employed as intermetal-dielectrics and passivation layers in the microelectronics industry (see B. Chin et al., Solid State Technology, p. 119 (April 1988)).
U.S. Pat. No. 5,593,741 to Ikeda discloses the use of a chemical vapor deposition (CVD) method for the deposition of silicon oxide films through the use of TEOS and oxygen in a plasma reaction chamber (with helium as a carrier). Ikeda""s process involves alternate depositions of thin oxide layers, first without a plasma and then with a plasma which provides an ion bombardment to improve the film""s properties and the film""s conformance to an underlying substrate. Even though the Ikeda specification quotes a range of deposition temperatures of from 200xc2x0 C. to 400xc2x0 C., it provides no examples to support substrate temperatures less than 300xc2x0 C. In addition, in U.S. Pat. No. 5,462,899, Ikeda describes a CVD method for forming a SiO2 layer using TEOS and ozone as the principal reactants. The substrate temperature (for an example using triethoxyfluorosilane) is cited as 400xc2x0 C. in the specification.
Even though plasma-enhanced CVD TEOS (PETEOS) and silane-based oxides can be deposited with high quality at acceptable deposition rates, these materials do have drawbacks for these envisioned applications. For example, device quality PETEOS SiO2 films are difficult to achieve at temperatures below 250xc2x0 C. (see T. Itani et al., Mat. Res. Soc. Symp., 446, p. 255, (1997)). Also, TEOS has a low vapor pressure of about 2 Torr (at 25xc2x0 C. and 1 atm.) which necessitates the heating of all delivery lines and chamber surfaces to avoid TEOS condensation. Such a low vapor pressure also prevents gas metering with conventional mass flow controllers (MFCs) (see S. Nguyen et al., J. Electrochem. Soc., 137, p. 2209, (July 1990)). Silane gas, conversely, is easily metered by conventional MFCs, but great care must be used because silane is a toxic and pyrophoric gas which constitutes an explosion hazard at high SiH4 concentrations. Because of these issues, there continues to be interest in various non-pyrophoric organosilicon gases with high vapor pressure as new silicon source materials for PECVD oxide applications.
In the examples given by Ikeda in U.S Pat. No. 5,593,741, besides TEOS, octamethylcyclotetrasiloxane and tris(diethylamino)silane are also used as the silicon sources. Meanwhile, Ikeda indicates that tetramethylsilane (TMS) can be used in the process in lieu of TEOS as well. However, the lowest substrate temperature cited in the specification is 300xc2x0 C. In U.S. Pat. No. 5,462,899, TMS is indicated as being an alternative silicon source, where the substrate temperature was reported to be 400xc2x0 C. In addition, U.S. Pat. No. 5,083,033 to Komano et al. describes the use of TMS as a reactant to produce a silicon oxide layer, using a focused ion beam to create an environment for the surface reaction. On the other hand, Guinn et al. in xe2x80x9cChemical Vapor Deposition of SiO2 from Ozonexe2x80x94Organosilane Mixtures Near Atmospheric Pressurexe2x80x9d, Materials Research Symposium Proceedings, Vol 282 (1993), indicate that TEOS is 5-10 times more reactive with ozone than is TMS, in a CVD reaction chamber, within a temperature range of 258xc2x0 C. to 328xc2x0 C. As can be seen from the above prior art, the lowest reaction temperature in a plasma chamber used for the deposition of SiO2 (where TMS is a precursor and the results are supported by experimental evidence) is about 258xc2x0 C.
Accordingly, it is an objective of this invention to provide an improved method for the deposition of TMS SiO2 wherein the deposition temperature is less than 250xc2x0 C. Furthermore, the mechanical properties as well as the conformality of TMS oxides have not been explored in detail; thus, investigation and exploitation of these properties of TMS oxide films is another objective of this invention. Moreover, low temperature oxide films typically exhibit relatively poor properties compared with high temperature films. Post-deposition annealing often improves the quality of deposited films. However, most published studies used an annealing temperature higher than the deposition temperature, which comprised the advantage of low temperature process. In order to preserve the low temperature aspect while seeking these improvement techniques, the present inventors have demonstrated the effectiveness of post-deposition annealing treatment at or below the deposition temperature.
In addition to gate dielectrics in TFTs, oxide films can be used in other applications, such as the inter-level dielectric. Another objective of this invention is to extend the applications of PECVD TMS (PETMS) oxides to micro- and nanofabrication beyond the gate dielectric application.
The present invention is directed to a method for forming a silicon oxide film on a substrate comprising the steps of: (a) heating the substrate to a deposition temperature of between about 25xc2x0 C. to 250xc2x0 C.; (b) providing tetramethylsilane (TMS) in a gas flow amount up to about 1,000 sccm in a plasma discharge; (c) developing pressure between about 0.001 Torr and 100 Torr; and (d) depositing SiO2 on the substrate. In one embodiment of the invention, the substrate comprises at least one of: a semiconductor, a dielectric, a conductor, a glass, a polymer, a plastic, a metal foil or combinations thereof. In another embodiment of the invention, the deposition temperature is from about 100xc2x0 C. to 200xc2x0 C. and the pressure of step (c) is between about 2 Torr to about 8 Torr. In a further embodiment of the invention, the TMS is provided in a gas flow amount up to about 100 sccm in a plasma discharge. In a preferred embodiment, the TMS in step (b) is the primary silicon containing precursor source and the plasma discharge of step (b) comprises oxygen atoms, radicals and ions. In an embodiment of the invention, the TMS to oxygen flow rate is present in a ratio of between about 1:10 to about 1:2000.
In one embodiment of the invention, the above described method further comprises the step of providing RF power of between about 1 W to 1000 W.
In one embodiment of the invention, the above described method further comprises a post-deposition annealing step which comprises applying a forming gas and heating the silicon oxide film to an annealing temperature at or below the deposition temperature of step (a). Preferably, the forming gas comprises hydrogen and a gas selected from the group including: argon, nitrogen, helium and mixtures thereof. In another embodiment of the invention, the leakage current through the silicon oxide film is reduced while the annealing temperature of the silicon oxide film is maintained at or below the deposition temperature of step (a). The leakage current is measured by applying a voltage across the silicon oxide film. In another embodiment of the invention, wherein the interface trap state density of the silicon oxide film is reduced while the annealing temperature of the silicon oxide film is maintained at or below the deposition temperature of step (a). In a further embodiment of the invention, the oxide charge density in the silicon oxide film is reduced while the annealing temperature of the silicon oxide film is maintained at or below the deposition temperature of step (a). In still a further embodiment of the invention, the amount of trapped charges in the oxide film as demonstrated by bi-directional dynamic capacitance-voltage (C-V) sweep is reduced while the annealing temperature of the silicon oxide film is maintained at or below the deposition temperature of step (a).
The present invention is also directed to a method for controlling the stress level of a silicon oxide film which is formed on a substrate comprising the steps of: (a) heating the substrate to a deposition temperature of between about 25xc2x0 C. to 250xc2x0 C.; (b) providing TMS in a gas flow amount up to about 1,000 sccm in a plasma discharge; (c) developing a pressure between about 0.001 Torr and 100 Torr; and (d) depositing SiO2 on the substrate, whereby the silicon oxide film exhibits a stress level between about xe2x88x921.0 GPa to 0.5 GPa. Preferably, the silicon oxide film exhibits a stress level between about xe2x88x920.5 GPa to 0.12 GPa.
In one embodiment of the invention, the stress of the silicon oxide film is adjusted by varying at least one condition selected from the following: TMS flow rate, TMS:O2 flow rate ratio, RF power, temperature, deposition pressure, substrate material and film thickness. In another embodiment of the invention, the silicon oxide film is adjusted by at least one of the above conditions so that the silicon oxide film exhibits zero stress or 0 GPa. In a further embodiment of the invention, wherein the above described method further comprises at least one step from the group including: decreasing the deposition temperature of step (a) and increasing the pressure of step (c), whereby the silicon oxide film exhibits tensile stress between about 0 GPa to about 0.5 GPa. In still a further embodiment of the invention, wherein the above described method further comprises at least one step from the group including: increasing the deposition temperature of step (a) and decreasing the pressure of step (c), whereby the silicon oxide film exhibits compressive stress between about xe2x88x921.0 GPa to about 0 GPa.
The present invention is further directed to a method for controlling the conformality of a silicon oxide film formed on a substrate comprising the steps of: (a) heating the substrate to a deposition temperature of between about 25xc2x0 C. to 250xc2x0 C.; (b) providing TMS in a gas flow amount up to about 1,000 sccm in a plasma discharge; (c) developing pressure between about 0.001 Torr and 100 Torr; and (d) depositing SiO2 on the substrate. In one embodiment of the invention, the conformality of the silicon oxide film is adjusted by varying at least one condition selected from the group consisting of. TMS flow rate, TMS:O2 flow rate ratio, RF power, temperature, deposition pressure, substrate material and film thickness. In another embodiment of the invention, the silicon oxide film is adjusted by at least one of the above conditions so that the silicon oxide film exhibits bumps, voids or combinations thereof.
In another embodiment of the invention, the above described method for controlling the conformality of a silicon oxide film further comprises at least one step from the group consisting of: decreasing the deposition temperature of step (a) to less than about 200xc2x0 C. and increasing the pressure of step (c) to above about 3 Torr, whereby the silicon oxide film exhibits conformal deposition topology on the substrate. Preferably, the deposition temperature is between about 25xc2x0 C. to 200xc2x0 C. and the pressure is between about 5 Torr and 100 Torr.
In a further embodiment of the invention, the above described described method for controlling the conformality of a silicon oxide film further comprises at least one step from the group including: increasing the deposition temperature of step (a) to at least 50xc2x0 C. and decreasing the pressure of step (c) to below about 10 Torr, wherein the silicon oxide film exhibits non-conformal deposition topology having a void or a seam disposed between the film and the substrate or within the film. Preferably, the deposition temperature is between about 50xc2x0 C. to about 250xc2x0 C. and the pressure is below about 8 Torr.